Round-Up : Runtime Verification of Quasi Linearizability for Concurrent Data Structures
dc.contributor.author | Zhang, Lu | |
dc.contributor.author | Chattopadhyay, Arijit | |
dc.contributor.author | Wang, Chao | |
dc.date.accessioned | 2022-02-24T09:18:48Z | |
dc.date.available | 2022-02-24T09:18:48Z | |
dc.date.issued | 2015 | |
dc.description | 1202-1216 p. ; 714ko. | en_US |
dc.identifier.issn | 0098-5589 | |
dc.identifier.uri | http://repository.usthb.dz//xmlui/handle/123456789/9018 | |
dc.language.iso | en | en_US |
dc.publisher | Institute of electrical and electronics engineers | en_US |
dc.subject | Quasilinéarisation | en_US |
dc.subject | Equations différentielles non linéaires : Solutions numériques | en_US |
dc.subject | Compilateur LLVM | en_US |
dc.subject | Code source | en_US |
dc.subject | Compilation (informatique) | en_US |
dc.title | Round-Up : Runtime Verification of Quasi Linearizability for Concurrent Data Structures | en_US |
dc.type | Article | en_US |