Dynamic Testing for Deadlocks via Constraints
dc.contributor.author | Cai, Yan | |
dc.contributor.author | Lu, Qiong | |
dc.date.accessioned | 2022-10-26T08:48:51Z | |
dc.date.available | 2022-10-26T08:48:51Z | |
dc.date.issued | 2016 | |
dc.description | 825-842 p. ; 2.044ko. | en_US |
dc.identifier.uri | http://repository.usthb.dz//xmlui/handle/123456789/9250 | |
dc.language.iso | en | en_US |
dc.publisher | Institute of electrical and electronics engineers | en_US |
dc.relation.ispartofseries | Institute of electrical and electronics engineers;vol.42-2016 | |
dc.subject | Détecteurs d’interblocage | en_US |
dc.subject | ConLock : technique | en_US |
dc.subject | Déclenchement de blocage | en_US |
dc.subject | Bogues (informatique) | en_US |
dc.subject | Logiciels : Défauts de conception | en_US |
dc.title | Dynamic Testing for Deadlocks via Constraints | en_US |
dc.type | Article | en_US |