Parallel Algorithms for Testing Finite State Machines:Generating UIO Sequences

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dc.contributor.authorHierons, Robert M.
dc.contributor.authorTurker, Uraz Cengiz
dc.date.accessioned2022-10-26T09:49:04Z
dc.date.available2022-10-26T09:49:04Z
dc.date.issued2016
dc.description1077-1091 p. ; 1.412ko.en_US
dc.identifier.urihttp://repository.usthb.dz//xmlui/handle/123456789/9261
dc.language.isoenen_US
dc.publisherInstitute of electrical and electronics engineersen_US
dc.relation.ispartofseriesInstitute of electrical and electronics engineers;vol.42-2016
dc.subjectGénie logicielen_US
dc.subjectLogiciels : Maintenanceen_US
dc.subjectDébogageen_US
dc.subjectMachine à états finisen_US
dc.subjectGénération unique de séquences d’entrées-sortiesen_US
dc.subjectUnités de traitement graphique à usage généralen_US
dc.titleParallel Algorithms for Testing Finite State Machines:Generating UIO Sequencesen_US
dc.typeArticleen_US

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